DEFECTIVE MEMORY CELL SENSING CIRCUIT AND A METHOD FOR TESTING A DEFECTIVE MEMORY CELL USING THE SAME, CAPABLE OF REDUCING THE NUMBER OF DQ PADS USED IN THE DEFECTIVE MEMORY CELL TEST

摘要

PURPOSE: A defective memory cell sensing circuit and a method for testing a defective memory cell using the same are provided to prevent many memory cells from unnecessarily replaced with redundancy cells by sensing the defect of the memory cells.;CONSTITUTION: A bank(1) includes first to fourth cell blocks(10-13). The bank includes a lot of the memory cells selectively accessed in response to an address signal. A defect sensor(3) senses the defect of the memory cell by reading the data of the accessed memory cells. A first cell block includes memory cells accessed when the address signal is a first level. The memory cells included in the first cell block store the same data. A second cell block includes the memory cells accessed when the address signal is a second level.;COPYRIGHT KIPO 2010