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ALGORITHMICALLY PROGRAMMABLE MEMORY TESTER WITH BREAKPOINT TRIGGER, ERROR JAMMING AND 'SCOPE MODE THAT MEMORIZES TARGET SEQUENCES
ALGORITHMICALLY PROGRAMMABLE MEMORY TESTER WITH BREAKPOINT TRIGGER, ERROR JAMMING AND 'SCOPE MODE THAT MEMORIZES TARGET SEQUENCES
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机译:具有断点触发,错误卡顿和可存储目标序列的“范围模式”的算法可编程存储器测试器
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摘要
Algorithmic test program 19, the trigger signal to detect the occurrence of the trigger specialization represented by the existing amount of hardware (97, 24) used to operate the DUT (14) (111) to the memory tester having. Which can be equipped with a more qualified according to whether any part of the test program is carried out (95) formed in the original hardware (breakpoint) trigger (96). Qualification breakpoint trigger that triggers the scope mode, and the selected value (147a - c) in order to force a particular route to a test program to an error flag, the system trigger signal (115 which can be used to put up a (152, 153 and 154) ) it can be delayed by zero or more cycles before the DUT 114. The user interacts with the program that is not part of the test process, defines the trigger from the specialization of the original mask and comparison mechanism to recognize a trigger condition (86) at the level hardware register value. The process is also (done by setting the instruction word (bits 93 in the instruction words) burden) to any part of the test program compiler is whether to allow specialization of the original trigger informs about. Voltage threshold (117, 118) and to provide stable waveforms for sweeping the sample timing offset 179, a memory tester is the target sequence of the transfer vector that is released during the first pass through the test program after the occurrence of the trigger (target sequence) writes the address (63) for (130). The instruction address is being exchanged as it is, then that instruction is changed to eliminate the branch is stored in the reserved part of the source of the instruction memory. When the modified target sequence is saved, the desired information is generated by running exactly as before and down to restart the entire test program, and triggers. Is now released from the stored target sequence, rather than being transmitted vector algorithm is in progress for a trigger, the combination of the voltage 166, and a sample timing offset threshold 168 is switched accordingly (164, 169). The combination constitutes one of the steps following the sweep of the value obtained. The received vector of the target sequence is stored as it gets (141, 142, 32b). After the test sequence the target program is restarted to the normal threshold value and a sample timing offset. After another trigger is one, and the replacement and the above target sequence again, and then the combination is made in the step following the acquisition sweep. This process continues until the sweep completes perform entire acquisition. It examines the stored data can be seen the generation of the waveform.
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