首页> 外国专利> ALGORITHMICALLY PROGRAMMABLE MEMORY TESTER WITH BREAKPOINT TRIGGER, ERROR JAMMING AND 'SCOPE MODE THAT MEMORIZES TARGET SEQUENCES

ALGORITHMICALLY PROGRAMMABLE MEMORY TESTER WITH BREAKPOINT TRIGGER, ERROR JAMMING AND 'SCOPE MODE THAT MEMORIZES TARGET SEQUENCES

机译:具有断点触发,错误卡顿和可存储目标序列的“范围模式”的算法可编程存储器测试器

摘要

Algorithmic test program 19, the trigger signal to detect the occurrence of the trigger specialization represented by the existing amount of hardware (97, 24) used to operate the DUT (14) (111) to the memory tester having. Which can be equipped with a more qualified according to whether any part of the test program is carried out (95) formed in the original hardware (breakpoint) trigger (96). Qualification breakpoint trigger that triggers the scope mode, and the selected value (147a - c) in order to force a particular route to a test program to an error flag, the system trigger signal (115 which can be used to put up a (152, 153 and 154) ) it can be delayed by zero or more cycles before the DUT 114. The user interacts with the program that is not part of the test process, defines the trigger from the specialization of the original mask and comparison mechanism to recognize a trigger condition (86) at the level hardware register value. The process is also (done by setting the instruction word (bits 93 in the instruction words) burden) to any part of the test program compiler is whether to allow specialization of the original trigger informs about. Voltage threshold (117, 118) and to provide stable waveforms for sweeping the sample timing offset 179, a memory tester is the target sequence of the transfer vector that is released during the first pass through the test program after the occurrence of the trigger (target sequence) writes the address (63) for (130). The instruction address is being exchanged as it is, then that instruction is changed to eliminate the branch is stored in the reserved part of the source of the instruction memory. When the modified target sequence is saved, the desired information is generated by running exactly as before and down to restart the entire test program, and triggers. Is now released from the stored target sequence, rather than being transmitted vector algorithm is in progress for a trigger, the combination of the voltage 166, and a sample timing offset threshold 168 is switched accordingly (164, 169). The combination constitutes one of the steps following the sweep of the value obtained. The received vector of the target sequence is stored as it gets (141, 142, 32b). After the test sequence the target program is restarted to the normal threshold value and a sample timing offset. After another trigger is one, and the replacement and the above target sequence again, and then the combination is made in the step following the acquisition sweep. This process continues until the sweep completes perform entire acquisition. It examines the stored data can be seen the generation of the waveform.
机译:在算法测试程序19中,触发信号用于检测触发专门化的发生,该触发专门化由用于操作DUT(14)(111)的现有硬件数量(97、24)来表示给存储器测试仪。根据是否执行了形成在原始硬件(断点)触发器(96)中的测试程序的任何部分(95),可以为其配备更合格的设备。限定范围触发点触发示波器模式,以及选定的值(147a-c),以便将通往测试程序的特定路径强制为错误标志,系统触发信号(115可用于建立(152) ,153和154)),可以在DUT 114之前将其延迟零个或更多个周期。用户与不属于测试过程的程序进行交互,从原始掩码的专业化和比较机制中定义触发器,以识别级别硬件寄存器值的触发条件(86)。该过程还(通过设置指令字(指令字中的第93位)负担)对测试程序编译器的任何部分是否允许原始触发器进行专门化告知。电压阈值(117、118)并提供稳定的波形以扫描采样定时偏移179,内存测试器是在触发发生后第一次通过测试程序期间释放的传输向量的目标序列(目标序列)将地址(63)写入(130)。指令地址按原样交换,然后更改指令以消除分支存储在指令存储器源的保留部分中。保存修改后的目标序列后,通过完全按照之前和向下运行的方式生成所需的信息,以重新启动整个测试程序并触发。现在从所存储的目标序列中释放,而不是针对触发来进行传输矢量算法,而是相应地切换电压166和采样定时偏移阈值168的组合(164、169)。组合构成扫掠获得的值之后的步骤之一。目标序列的接收向量在获得时被存储(141、142、32b)。在测试序列之后,目标程序将重新启动到正常阈值和采样定时偏移。在另一个触发之后,再次进行替换和上述目标序列,然后在采集扫描之后的步骤中进行组合。该过程一直持续到扫描完成执行整个采集为止。它检查存储的数据可以看到波形的产生。

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