首页> 外国专利> Scanning circuit e.g. sample-and-hold circuit, for scanning input signal in analog/digital converter, has multiplexer unit combining output signals, and switching elements controlled by two pairs of differential clock pulses,

Scanning circuit e.g. sample-and-hold circuit, for scanning input signal in analog/digital converter, has multiplexer unit combining output signals, and switching elements controlled by two pairs of differential clock pulses,

机译:扫描电路采样保持电路,用于扫描模/数转换器中的输入信号,具有将输出信号组合在一起的多路复用器单元,以及由两对差分时钟脉冲控制的开关元件,

摘要

The circuit has a switching arrangement (16) operated in a phase opposite to another switching arrangement (14) for switching an input signal. A multiplexer unit (18) for combining output signals of the arrangements (14, 16) exhibits two staggered differentially switched pairs of switching elements. One of the pair of switching elements is controlled by differential clock pulses (CLK2, CLKB2) and another pair of switching elements is controlled by clock pulses (CLK1, CLKB). Frequency of the clock pulses (CLK2, CLKB2) amounts to half of the frequency of the clock pulses (CLK1, CLKB1). An independent claim is also included for a method for scanning an input signal.
机译:该电路具有以与另一开关装置(14)相反的相位操作的开关装置(16),用于开关输入信号。用于组合装置(14、16)的输出信号的多路复用器单元(18)具有两个交错的开关元件的差分开关对。一对开关元件中的一个由差分时钟脉冲(CLK2,CLKB2)控制,另一对开关元件由时钟脉冲(CLK1,CLKB)控制。时钟脉冲(CLK2,CLKB2)的频率等于时钟脉冲(CLK1,CLKB1)的频率的一半。还包括一种用于扫描输入信号的方法的独立权利要求。

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