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Logic basic cell, logic basic cell array, and, logic circuit

机译:逻辑基本单元,逻辑基本单元阵列以及逻辑电路

摘要

Logic basic cell is provided for logically combining the second input signal and the first input signal for the logic subfunction second, the second logic function block and the first logic function block, or the first that can be predetermined have. Also, the logic basic cell is provided with a first logic transistor having a source / drain terminal and a gate terminal coupled to the first logic function block. Third input signal can be supplied to the gate terminal. In the source / drain terminal, the output signal can be supplied. Moreover, the second logic transistor is coupled to a second logic function block, a source / drain terminal and a gate terminal are provided. In the gate terminal, complementary signals can be supplied to the third input signal. The source / drain terminal is coupled to the source / drain terminal of the first logic transistor.
机译:提供逻辑基本单元,用于逻辑地组合第二输入信号和第一输入信号,以用于逻辑子功能第二,第二逻辑功能块和第一逻辑功能块,或者可以预定的第一子功能。而且,逻辑基本单元设置有第一逻辑晶体管,该第一逻辑晶体管的源极/漏极端子和栅极端子耦合到第一逻辑功能块。可以将第三输入信号提供给栅极端子。在源极/漏极端子中,可以提供输出信号。此外,第二逻辑晶体管耦合到第二逻辑功能块,提供了源极/漏极端子和栅极端子。在栅极端子中,可以将互补信号提供给第三输入信号。源极/漏极端子耦合到第一逻辑晶体管的源极/漏极端子。

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