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DMA transfer control system that performs data decode and data transfer and that generates a no operation (NOP) interrupt signal to end the DMA transfer processing in response to a NOP designation
DMA transfer control system that performs data decode and data transfer and that generates a no operation (NOP) interrupt signal to end the DMA transfer processing in response to a NOP designation
A direct memory access (DMA) transfer apparatus configured to sequentially read, into a register, at least one transfer setting value for data transfer stored in a memory and to perform DMA transfer processing based on the read transfer setting value includes a unit configured to receive a No Operation (NOP) designation for designating no performance of DMA transfer as the transfer setting value, and a unit configured to generate, if the NOP designation has been performed with the transfer setting value read into the register, an NOP interrupt signal to end transfer processing without performing the DMA transfer.
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