首页>
外国专利>
HYBRID CONDUCTIVE VIAS INCLUDING SMALL DIMENSION ACTIVE SURFACE ENDS AND LARGER DIMENSION BACK SIDE ENDS, SEMICONDUCTOR DEVICES INCLUDING THE SAME, AND ASSOCIATED METHODS
HYBRID CONDUCTIVE VIAS INCLUDING SMALL DIMENSION ACTIVE SURFACE ENDS AND LARGER DIMENSION BACK SIDE ENDS, SEMICONDUCTOR DEVICES INCLUDING THE SAME, AND ASSOCIATED METHODS
展开▼
机译:混合导电通孔,包括小尺寸有源表面端和较大尺寸的后端,包括相同器件的半导体器件以及相关方法
展开▼
页面导航
摘要
著录项
相似文献
摘要
A conductive via of a semiconductor device includes a relatively small diameter portion extending into an active surface of a fabrication substrate and a corresponding, relatively large diameter portion that extends into a back side of the fabrication substrate. This type of conductive via may be fabricated by forming the relatively small diameter portion before or during BEOL processing, while the large diameter portion of each conductive via may be fabricated after BEOL processing is complete. Electronic devices that include one or more semiconductor devices with such conductive vias are also disclosed.
展开▼