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HIGH SPEED TURBO CODES DECODER FOR 3G USING PIPELINED SISO LOG-MAP DECODERS ARCHITECTURE
HIGH SPEED TURBO CODES DECODER FOR 3G USING PIPELINED SISO LOG-MAP DECODERS ARCHITECTURE
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机译:采用管线式SISO LOG-MAP解码器架构的3G高速TURBO编码解码器
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摘要
A MIMO system with Diversity processing is provided having Turbo Codes Decoders for computing orthogonal signals from multiple separate antennas. The invention decodes multipath signals that have arrived at the terminal via different routes after being reflected from buildings, trees or hills. The Turbo Codes Decoder with Diversity processing increases the signal to noise ratio (SNR) more than 6 dB which enables the Wireless system to deliver data rates from up to 200 Mbit/s. The invention provides several improved Turbo Codes Decoder methods and devices that provide a more suitable, practical and simpler method for implementation a Turbo Codes Decoder in ASIC (Application Specific Integrated Circuits) or DSP codes. A Turbo Codes Decoder block is provided to compute baseband signals from multiple different receiver paths. Several pipelined max-Log-MAP decoders are used for iterative decoding of received data. A Sliding Window of Block N data is used for pipeline operations. In a pipeline mode, a first decoder A decodes block N data from a first source, while a second decoder B decodes block N data from a second source during the same clock cycle. Pipelined max-Log-MAP decoders provide high speed data throughput and one output per clock cycle.
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