首页> 外国专利> Method and apparatus for shielding tunneling circuit and floating gate for integration of a floating gate voltage reference in a general purpose CMOS technology

Method and apparatus for shielding tunneling circuit and floating gate for integration of a floating gate voltage reference in a general purpose CMOS technology

机译:在通用CMOS技术中屏蔽隧道电路和浮栅以集成浮栅参考电压的方法和装置

摘要

A method and corresponding structure for shielding a floating gate tunneling element. The method comprises disposing a floating gate over a gate oxide using standard CMOS processing in two active areas defined by first and second doped well regions formed in a substrate surrounded by field oxide, and forming a floating gate shield layer so as to enclose the floating gate. The floating gate includes a first floating gate portion over an active area in the first doped well region and a second floating gate portion over the active area in the second doped well region. The first floating gate portion is substantially smaller than the second floating gate portion so as to enable adequate voltage coupling for Fowler-Nordheim tunneling to occur between the first doped well region and the first floating gate portion. The direction of tunneling is determined by high voltage application to one of the doped well regions.
机译:一种用于屏蔽浮栅隧穿元件的方法和相应的结构。该方法包括:使用标准CMOS工艺在由有源氧化物围绕的衬底中形成的第一和第二掺杂阱区域所限定的两个有源区域中,使用标准CMOS工艺在栅极氧化物上设置浮栅;以及形成浮栅屏蔽层以便包围浮栅。 。浮栅包括在第一掺杂阱区域中的有源区域上方的第一浮栅部分和在第二掺杂阱区域中的有源区域上方的第二浮栅部分。第一浮置栅极部分实质上小于第二浮置栅极部分,从而使得能够在第一掺杂阱区域和第一浮置栅极部分之间发生用于福勒-诺德海姆隧穿的足够的电压耦合。隧道的方向是通过对掺杂的阱区之一施加高压来确定的。

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