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System for synchronizing an in-order co-processor with an out-of-order processor using a co-processor interface store data queue
System for synchronizing an in-order co-processor with an out-of-order processor using a co-processor interface store data queue
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机译:使用协处理器接口存储数据队列将有序协处理器与无序处理器同步的系统
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摘要
A processor includes a coprocessor interface unit that couples a coprocessor that executes instructions in-program order to an execution unit that executes instructions out-of-program order. The coprocessor interface unit includes a coprocessor store data queue. If data stored in a register of the coprocessor is to be stored in a register file of the execution unit, the data is transferred from the coprocessor to the coprocessor store data queue. A graduation unit coupled to the coprocessor is also provided. The graduation unit provides a signal to the coprocessor that determines whether an instruction executed by the coprocessor is permitted to alter an architectural state of the processor.
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