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SHIFT REGISTER AND SHIFT REGISTER UNIT FOR DIMINISHING CLOCK COUPLING EFFECT

机译:缩短时钟耦合效果的移位寄存器和移位寄存器单元

摘要

A shift register and a shift register unit for diminishing clock coupling effect are introduced herein. Each stage shift register unit includes at least one pull-up driving module, a pull-up module, at least one pull-down module and a pull-down driving module. Before a waveform of either a first clock signal or a second clock signal employed by the pull-up module transits into a rising edge, the pull-down driving module employs a first periodic signal to turn on the pull-down module in advance for a specific period, and/or before the waveform of the first or second clock signal employed by the pull-up module transits into a falling edge, the pull-down driving module employs a second periodic signal to turn off the pull-down module in advance for a specific period. Accordingly, the pull-down module can gain a sufficient capability against the clock coupling effect so as to optimize the waveform outputted from the shift register unit.
机译:这里介绍了用于减小时钟耦合效应的移位寄存器和移位寄存器单元。每一级移位寄存器单元包括至少一个上拉驱动模块,上拉模块,至少一个下拉模块和下拉驱动模块。在上拉模块采用的第一时钟信号或第二时钟信号的波形转变为上升沿之前,下拉驱动模块采用第一周期性信号来预先开启下拉模块以保持低电平。特定时间段,和/或在上拉模块采用的第一或第二时钟信号的波形转变为下降沿之前,下拉驱动模块采用第二周期性信号预先关闭下拉模块在特定时期内。因此,下拉模块可以获得足够的抵抗时钟耦合效应的能力,以优化从移位寄存器单元输出的波形。

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