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Circuit and method for reducing charge injection and clock feed-through in switched capacitor circuits

机译:用于减少开关电容器电路中的电荷注入和时钟馈通的电路和方法

摘要

A low charge injection, low clock feed-through switch (1) has an input signal (Vin) applied both to the sources of first (S1) and second (2) switching transistors. A first clock signal (P) having pulses of a first duration ts is applied to a gate of the first switching transistor, and a second clock signal (Pcoarse) having pulses of a second duration m×ts substantially less than the first duration is applied to a gate of the second switching transistor. A capacitor (C) is charged toward the input voltage through both the first and second switching transistors during the pulse of the second clock signal. The capacitor is charged further toward the input voltage during a remaining portion of the pulse of the first clock signal.
机译:低电荷注入,低时钟直通开关( 1 )的输入信号(Vin)施加到第一个(S 1 )和第二个(< B> 2 )开关晶体管。具有第一持续时间为ts的脉冲的第一时钟信号(P)被施加到第一开关晶体管的栅极,并且具有第二持续时间为m×ts的脉冲的第二时钟信号(P coarse )基本上小于第一持续时间的时间被施加到第二开关晶体管的栅极。在第二时钟信号的脉冲期间,电容器(C)通过第一和第二开关晶体管朝着输入电压充电。在第一时钟信号的脉冲的剩余部分期间,电容器进一步向输入电压充电。

著录项

  • 公开/公告号US7663424B2

    专利类型

  • 公开/公告日2010-02-16

    原文格式PDF

  • 申请/专利权人 PAUL STULIK;

    申请/专利号US20070786194

  • 发明设计人 PAUL STULIK;

    申请日2007-04-11

  • 分类号G06F7/64;

  • 国家 US

  • 入库时间 2022-08-21 18:49:38

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