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Computing circuits and method for running an MPEG-2 AAC or MPEG-4 AAC audio decoding algorithm on programmable processors

机译:在可编程处理器上运行MPEG-2 AAC或MPEG-4 AAC音频解码算法的计算电路和方法

摘要

The present invention relates to computing circuits and method for running an MPEG-2 AAC or MPEG-4 AAC algorithm efficiently, which is used as an audio compression algorithm in multi-channel high-quality audio systems, on programmable processors. In accordance with the present invention, the IMDCT process which takes large part of the amount of the operations in implementation of an MPEG-2/4 AAC algorithm can be performed in efficient. In addition, while the architecture of the existing digital signal processor is still used, the performance can be improved by means of the addition of the architecture of the address generator, Huffman decoder, and bit processing architecture. After all, to design and change the programmable processor is facilitated.
机译:本发明涉及在可编程处理器上有效运行MPEG-2 AAC或MPEG-4 AAC算法的计算电路和方法,该算法被用作多通道高质量音频系统中的音频压缩算法。根据本发明,可以有效地执行在执行MPEG-2 / 4 AAC算法中占用大部分操作量的IMDCT处理。另外,尽管仍然使用现有数字信号处理器的体系结构,但是可以通过添加地址生成器,Huffman解码器和位处理体系结构来提高性能。毕竟,便于设计和更改可编程处理器。

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