Device using multiple DMA controllers for transferring data between a storage device and multiple processing units

摘要

A processor system including a plurality of arithmetic units capable of performing arithmetic processing in parallel; a storage which stores data that the arithmetic units use for arithmetic processing; a plurality of DMA controllers which perform data transfer between the arithmetic units, and between the arithmetic units and the storage in parallel with processing of a host processor; and a DMA control circuit which controls start-up the arithmetic units and the DMA controllers in parallel with processing of the host processor.