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Single bit control of threads in a multithreaded multicore processor

机译:多线程多核处理器中线程的单位控制

摘要

A method and mechanism for controlling threads in a multithreaded multicore processor. A processor includes multiple cores, each of which are capable of executing multiple threads. A control register which is shared by each of the cores is utilized to control the status of the threads in the processing system. In one embodiment, the shared register includes a single bit for each thread in the processor. Depending upon the value written to a bit of the shared register, one of three results may occur with respect to a thread which corresponds to the bit. In one embodiment, writing a “0” to a bit of the shared register will cause a corresponding thread to be Parked. Writing a “1” to a bit of the shared register will cause a corresponding thread to either be UnParked or be Reset. Whether writing a “1” to a bit of the register causes the corresponding thread to be UnParked or Reset depends upon a state of the processor.
机译:一种用于控制多线程多核处理器中的线程的方法和机制。一个处理器包括多个内核,每个内核都能够执行多个线程。每个内核共享的控制寄存器用于控制处理系统中线程的状态。在一个实施例中,共享寄存器包括处理器中每个线程的单个位。根据写入共享寄存器的某个位的值,相对于与该位对应的线程可能会出现三种结果之一。在一个实施例中,将“ 0”写入共享寄存器的一位将导致相应线程被驻留。向共享寄存器的某个位写入“ 1”将导致相应的线程被释放或复位。向寄存器的某个位写入“ 1”是否导致相应的线程被释放或复位取决于处理器的状态。

著录项

  • 公开/公告号US7676655B2

    专利类型

  • 公开/公告日2010-03-09

    原文格式PDF

  • 申请/专利权人 PAUL J. JORDAN;

    申请/专利号US20040880917

  • 发明设计人 PAUL J. JORDAN;

    申请日2004-06-30

  • 分类号G06F9/30;

  • 国家 US

  • 入库时间 2022-08-21 18:47:44

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