TRIGGERING AND REAL TIME MONITORING SYSTEM FOR SVC THYRISTOR VALVES

摘要

Accordingly, there is provided a triggering and real time monitoring system for SVC-thyristor valves, the thyristor valve (V) comprising a plurality of anti-parallel thyrsitors (T) having a plurality of monitoring cables (RC), the number of thyrsitors (T) and the number of monitoring cables (RC) being atleast one more than the number of the thyrsitor valves (V), the system comprising a controller for receiving voltage (V) and current (I) signals from a power source (S); a triggering and monitoring device for receiving control and commands from the controller, the triggering and monitoring device being interfaced to the thyrsitor valves by atleast one optic cables and a monitoring cable for triggering and monitoring via a thyrsitor controlled reactor, coded data received from the TCR being decoded, processed and sent to a PC connected with a printer for display. The thyristor valve comprises a number of anti-parallel connected thyristors in series. Each level has a pair of anti - parallel thyristors, a snubber, a voltage sharing resistor and a Thyristor Electronics. In a preferred embodiment, two thyristors share one Thyristor Electronics. The thyristors that share one Thyristor Electronics is selected such that the voltages on the Thyristor Electronics are less than 100 V, which helps to ease the design of the Thyristor Electronics. Such a configuration also results in reduction in the number of thyristor electronics and the monitoring cables. The proposed system has only "N+1" thyristor electronics and monitoring cables in the conventional system a thyristor valve comprising "N" anti parallel levels has "2N" thyristors, and hence "2N" thyristor electronics and monitoring cables reduces the number to almost half. This configuration also helps to obtain a more detailed information of the level. The use of FPGAs in the triggering circuit helps in generating windows of time and sending coded pulses in these windows to trigger and monitor the pulses. The use of cables with multiple inputs and multiple outputs helps in reducing the number of triggering sources. As shown in the example only one triggering source is adequate to trigger 7 thyristors, a 100% redundancy is also achieved by this configuration by sending the triggering pulses through two sources simultaneously. To monitor the health of the trigger sources some of the monitoring pulses are transmitted only through a selected source. The use of FPGAs and microcontrollers help in latching and processing the data in real time in order to have a real time control over the monitoring system. The window generated are used to segregate the data coming from the thyristor valve. These windows are also used to generate interrupts for the micro- controller to enable real time data collection and processing. The present invention thus provides a novel method of sending coded monitoring pulses along with the triggering pulses is used. The coding of the pulses are carried out by a triggering module of the control electronics using Field Programmable Gate Arrays (FPGAs). Such coded pulses are converted to optical pulses and sent to the Thyristor Electronics.