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BIT INTERLEAVED LDPC CODED MODULATION AND PHYSICAL LAYER SIGNALING

机译:比特交错LDPC编码调制和物理层信令

摘要

A proposal for a DVB-C2 baseline system, mainly focused on the channel coding and bit interleaving modules for spectrally efficient modulation is described. Due to the implementation simplicity of the low density parity check (LDPC) codes standardized in the DVB-S2 specification, it is proposed to extend their application to cable channels and choose the subset with long block length ( L = 64800 ) and medium to high rates ( 2/5 ≤ R ≤ 9/10 ) as the forward error correction (FEC) codes of DVB-C2 systems. Due to the non-uniform bitwise error protection inherent to high-order modulations (e.g. 256-QAM, 1024-QAM) and irregular LDPC codes (e.g. DVB-S2 codes), there exists a mismatch between the modulation and the channel coding in general if the two modules are developed independently but concatenated directly. To match the error resilience of a finite-length channel code and a given constellation, the principles described herein design a bit interleaver and insert it between the channel encoder and the modulator. As a result, a better tradeoff between bandwidth-efficiency and power-efficiency can be achieved with a minor increase of hardware complexity.
机译:描述了针对DVB-C2基线系统的提案,该提案主要关注于频谱有效调制的信道编码和比特交织模块。由于DVB-S2规范中标准化的低密度奇偶校验(LDPC)码的实现简便性,建议将其应用扩展到电缆信道,并选择具有长块长度(L = 64800)和中到高的子集速率(2/5≤R≤9/10)作为DVB-C2系统的前向纠错(FEC)码。由于高阶调制(例如256-QAM,1024-QAM)和不规则LDPC码(例如DVB-S2码)所固有的非均匀逐位错误保护,通常在调制和信道编码之间存在不匹配如果两个模块是独立开发但直接串联在一起的。为了匹配有限长度信道码和给定星座的错误恢复能力,本文描述的原理设计了比特交织器,并将其插入信道编码器和调制器之间。结果,可以在硬件效率稍有增加的情况下实现带宽效率和功率效率之间的更好权衡。

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