首页> 外国专利> Device with improved dynamic characteristics for formation of the optimal time chart for the mean change SPEED EXECUTIVE BODY AC Drives

Device with improved dynamic characteristics for formation of the optimal time chart for the mean change SPEED EXECUTIVE BODY AC Drives

机译:具有改善的动态特性的设备,可为平均变化形成最佳时间表SPEED EXECUTIVE BODY AC Drives

摘要

The utility model is directed to a device with improved dynamic characteristics, by forming an optimum speed diagram for the speed change average executive AC drive and allows together with the system of automatic control of the electric actuator body speed to reach high precision working out a predetermined motion diagram.; The technical result is achieved in a device with improved dynamic characteristics for forming-optimal chart for mean change speed executive AC drive that includes a first setting unit, whose output is connected to a first input of the first proportional unit, an output of the first proportional block connected to the input of the first block limiting value of its input signal, the output of the first block, limiting its value when input signal is coupled to a first input of the first block of the algebraic adder, the output of the first block of the algebraic adder is connected with the input of the first integral unit, an output of the first integral unit is connected to the input of the second integral unit and to an input of the fifth proportional unit, an output of the second integral unit is connected to the input of the third integral unit and proportional to the input of the fourth unit, an output of the third integral unit connected to the first input of the second block of the algebraic adder, the output of the second b Lok algebraic adder is connected to a second input of the first proportional unit, an output of the fourth proportional block connected to the third input of the first proportional unit, an output of the fifth proportional block is connected to a fourth input of the first proportional block, the first set point output coupled to a first input of the third unit of the algebraic adder, the first input proportional second block and a first input proportional to the sixth unit, an output proportional to the second block connected to the input a second unit, limiting the value of its input signal, the second output of the unit, limiting the value of its input connected to the second input of the first block of the algebraic adder, the output of the sixth proportional block is connected to the input of the third unit, limiting the value of its input signal, a third block output limiting value its input connected to the third input of the first block of the algebraic adder, the second ramp output connected to the second input of the second algebraic unit Cesky adder, the second input of the third unit of the algebraic adder, the first input of the seventh proportional unit and the first input of the eighth proportional unit, an output of the seventh proportional block is connected to the input of the fourth unit, limiting the value of its input signal, the fourth block output limiting value of its input signal is connected to a fourth input of the first block of the algebraic adder, the output proportional to the eighth block connected to the input of the fifth unit, the limiting of Achen its input signal the fifth block output limiting value of its input signal is coupled to a fifth input of the first block of the algebraic adder, the third block of output of the algebraic adder is connected with the input of the sixth unit, limiting the value of its input signal to the input of the module calculation block, and a block input determining the sign of the signal, the sixth block out limiting value of its input connected to the second input of the second block and proportional to the second input of the eighth Proport ionalnogo unit module calculating block output is connected to the input of the third proportional unit, an output of the third proportional block connected to the input of the first block of arithmetic functions, the output of the first block of arithmetic functions is connected to the input of erection function block to a power outlet construction function unit to the power coupled to the input of the second unit of arithmetic functions, arithmetic functions second unit output is connected to first and second inputs of said first work unit and to an input unit of the ninth proportional and, the first product unit output is connected to the input of the tenth proportional unit, an output of the tenth proportional block connected to the first input of the fourth block of the algebraic adder, the ninth proportional block output is connected to a second input of the fourth block of the algebraic adder, the fourth block of the output of the algebraic adder is connected with the input of the third unit of arithmetic functions of the third block of arithmetic functions output connected to the input of the eleventh proportional unit, an output of the eleventh n roportsionalnogo unit connected to the first input of the second unit of work, determining the sign of the signal unit output is connected to a second input of the second unit of work, the second output of the unit product is coupled to a second input of the sixth proportional block and to the second input of the seventh proportional unit, the second unit output of the algebraic adder is connected with the third a second input proportional to block the third input of the proportional sixth block, the third input block and the seventh proportional to the third input eighth proportional block.
机译:本实用新型针对一种动态特性得到改善的装置,其通过形成用于变速平均执行交流驱动器的最佳速度图,并允许与电动执行器本体速度的自动控制系统一起达到预定的高精度。运动图。在具有改进的动态特性的用于形成平均变速执行交流驱动器的最优图表的装置中实现了该技术结果,该装置包括第一设定单元,其第一输出端与第一比例单元的第一输入端相连。比例块连接到第一个块的输入端,限制其输入信号的值,即第一个块的输出,当输入信号耦合到代数加法器的第一个块的第一个输入时,限制其值代数加法器的块与第一积分单元的输入连接,第一积分单元的输出与第二积分单元的输入和第五比例单元的输入,第二积分单元的输出连接与第三积分单元的输入连接,并且与第四单元的输入成比例,第三积分单元的输出连接到第三积分单元的第一输入e代数加法器,第二b乐代数加法器的输出连接到第一比例单元的第二输入,第四比例块的输出连接到第一比例单元的第三输入,第五比例块的输出该输入端与第一比例块的第四输入端相连,第一设定点输出与代数加法器的第三单元的第一输入端相连,第一输入比例的第二块和与第六单元相称的第一输入端成比例地输出到连接到第二单元的第二块的第二个单元,限制其输入信号的值,该单元的第二个输出,限制其连接到代数加法器的第一个块的第二个输入的值,第六比例块连接到第三单元的输入,限制其输入信号的值,第三块输出限制值,其输入连接到第一bl的第三输入代数加法器,第二斜坡输出连接到第二代数单元Cesky加法器的第二输入,代数加法器第三单元的第二输入,第七比例单元的第一输入和第八单元的第一输入比例单元,第七比例块的输出连接到第四单元的输入,限制其输入信号的值,第四块输出其输入信号的限制值连接到第四单元的输入信号代数加法器,将与第八个块成比例的输出连接到第五个单元的输入,对Achen的输入信号进行限制,第五个块的输入信号的输出限制值耦合到代数加法器的第一个块的第五个输入,代数加法器的输出的第三块与第六个单元的输入连接,将其输入信号的值限制为模块计算块的输入,以及一个块输入确定信号的符号后,第六块输出的极限值连接到第二块的第二输入,并与第八比例比例单位模块的第二输入成比例,计算块输出连接到第三比例的输入单元,将第三比例块的输出连接至第一算术功能块的输入,将第一比例算术功能块的输出连接至安装功能块的输入,以将电源连接至功率输出构造功能单元算术功能第二单元输出连接到所述第一工作单元的第一和第二输入以及第九比例输入单元,并且算术功能第二单元输出连接到所述算术函数第二单元的输入,所述第一乘积单元输出连接到第十比例单元,第十比例模块的输出连接到代数加法器第四模块的第一输入,第九个比例块输出连接到代数加法器的第四块的第二输入,代数加法器输出的第四块与第三单元的算术函数的输入连接在第十一比例单元的输入端,第十一n roportsionalnogo单元的输出端连接到第二工作单元的第一输入端,确定信号单元输出的正负号连接到第二工作单元的第二输入端,单位乘积的第二输出耦合到第六比例块的第二输入和第七比例单元的第二输入,代数加法器的第二单元输出与第三比例块的第二输入相连接。比例第六块的第三输入,第三输入块和第七与第三输入成比例的第八比例块。

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