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Opportunistic Timing Control in Mixed-Signal System-On-Chip Designs

机译:混合信号片上系统设计中的机会定时控制

摘要

An integrated circuit may include a plurality of circuit sub-systems that include at least one converter circuit operating in respective critical phases and non-critical phases of operation, a clock distribution circuit that has an input for an externally-supplied clock signal that is active during the non-critical phases and inactive during the critical phases, and a clock generator to generate an internal clock signal to the converter circuit that is active when the external-supplied clock signal is inactive.
机译:一种集成电路可以包括多个电路子系统,其包括至少一个分别在工作的关键阶段和非关键阶段工作的转换器电路,时钟分配电路,该时钟分配电路具有用于外部提供的有效时钟信号的输入时钟发生器在非关键阶段期间处于非活动状态,而在关键阶段期间处于非活动状态,并且时钟产生器向转换器电路生成内部时钟信号,当外部提供的时钟信号处于非活动状态时,该内部时钟信号处于活动状态。

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