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BUS BRIDGE FROM PROCESSOR LOCAL BUS TO ADVANCED EXTENSIBLE INTERFACE
BUS BRIDGE FROM PROCESSOR LOCAL BUS TO ADVANCED EXTENSIBLE INTERFACE
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机译:从处理器本地总线到高级可扩展接口的总线桥接
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摘要
Disclosed is a method of processing a read/write request conforming to the PLB bus protocol and a bus bridge from PLB bus to AXI bus, the method comprising: receiving the read/write request conforming to the PLB bus protocol without waiting for an acknowledgement of successful execution of a previous read/write request conforming to the PLB bus protocol; buffering the read/write request conforming to the PLB bus protocol; mapping the buffered read/write request conforming to the PLB bus protocol to a read/write request conforming to a AXI bus protocol; and outputting the mapped read/write request conforming to the AXI bus protocol. The method and the bus bridge enable IP modules conforming to PLB bus protocol and AXI bus protocol to communicate and perform transaction mapping during communication, to guarantee that all the transactions are performed in an order desired by the PLB device, and improve communication efficiency of the SoC.
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