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BUS BRIDGE FROM PROCESSOR LOCAL BUS TO ADVANCED EXTENSIBLE INTERFACE

机译:从处理器本地总线到高级可扩展接口的总线桥接

摘要

Disclosed is a method of processing a read/write request conforming to the PLB bus protocol and a bus bridge from PLB bus to AXI bus, the method comprising: receiving the read/write request conforming to the PLB bus protocol without waiting for an acknowledgement of successful execution of a previous read/write request conforming to the PLB bus protocol; buffering the read/write request conforming to the PLB bus protocol; mapping the buffered read/write request conforming to the PLB bus protocol to a read/write request conforming to a AXI bus protocol; and outputting the mapped read/write request conforming to the AXI bus protocol. The method and the bus bridge enable IP modules conforming to PLB bus protocol and AXI bus protocol to communicate and perform transaction mapping during communication, to guarantee that all the transactions are performed in an order desired by the PLB device, and improve communication efficiency of the SoC.
机译:公开了一种处理符合PLB总线协议的读/写请求和从PLB总线到AXI总线的总线桥的方法,该方法包括:接收符合PLB总线协议的读/写请求,而无需等待对它的确认。成功执行符合PLB总线协议的先前的读/写请求;缓冲符合PLB总线协议的读/写请求;将缓存的符合PLB总线协议的读/写请求映射为符合AXI总线协议的读/写请求;输出符合AXI总线协议的映射读/写请求。该方法和总线桥接器使得符合PLB总线协议和AXI总线协议的IP模块能够在通信过程中进行通信并进行事务映射,以保证所有的事务都以PLB设备期望的顺序执行,提高了通信效率。 SoC。

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