首页> 外国专利> Method for reducing current consumption of digital-to-analog conversion, and associated tri-state current digital-to-analog converter

Method for reducing current consumption of digital-to-analog conversion, and associated tri-state current digital-to-analog converter

机译:减少数模转换的电流消耗的方法及相关的三态电流数模转换器

摘要

A method for reducing current consumption of digital-to-analog conversion includes: monitoring logical states of a set of differential digital inputs, wherein the set of differential digital inputs are utilized for controlling at least one tri-state current Digital-to-Analog Converter (DAC) cell of a tri-state current DAC, and the tri-state current DAC cell has a positive output current state, a zero output current state and a negative output current state; and when the logical states of the set of differential digital inputs instruct the tri-state current DAC cell should output no positive/negative current, controlling the tri-state current DAC cell to switch to the zero output current state, temporarily decreasing a direct current passing through a middle path of the tri-state current DAC cell. An associated tri-state current DAC is also provided, where the tri-state current DAC includes: the at least one tri-state current DAC cell; and a control device.
机译:一种减少数模转换的电流消耗的方法,包括:监视一组差分数字输入的逻辑状态,其中,该组差分数字输入用于控制至少一个三态电流数模转换器。 (DAC)单元为三态电流DAC,并且三态电流DAC单元具有正输出电流状态,零输出电流状态和负输出电流状态;当一组差分数字输入的逻辑状态指示三态电流DAC单元不输出正/负电流时,控制三态电流DAC单元切换到零输出电流状态,从而暂时降低直流电穿过三态电流DAC单元的中间路径。还提供了相关的三态电流DAC,其中三态电流DAC包括:至少一个三态电流DAC单元;以及至少一个三态电流DAC单元。和控制装置。

著录项

  • 公开/公告号US7924197B1

    专利类型

  • 公开/公告日2011-04-12

    原文格式PDF

  • 申请/专利权人 CHANG-SHUN LIU;TSE-CHI LIN;

    申请/专利号US20090611935

  • 发明设计人 CHANG-SHUN LIU;TSE-CHI LIN;

    申请日2009-11-04

  • 分类号H03M1/66;

  • 国家 US

  • 入库时间 2022-08-21 18:11:14

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