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Method of accurate prediction of electrostatic discharge (ESD) performance in multi-voltage environment
Method of accurate prediction of electrostatic discharge (ESD) performance in multi-voltage environment
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机译:准确预测多电压环境下静电放电(ESD)性能的方法
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摘要
The present invention relates generally to semiconductor wafer fabrication and more particularly but not exclusively to predictive, pre-fabrication methodologies for determining inefficiencies in an integrated circuit (IC) design. The present invention, in one or more implementations, provides an effective pre-production methodology for predicting the efficiency and behavior of a designed ESD protective circuit and testing the ESD protective circuit with a simulated IC. The method of the present invention yields predictive results that have been comparatively tested.
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