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Top level hierarchy wiring via 1×N compiler

机译:通过1×N编译器进行顶层层次结构布线

摘要

Embodiments that route 1×N building blocks using higher-level wiring information for a 1×N compiler are disclosed. Some embodiments comprise determining higher-level coordinates for a blockage of a 1×N building block, determining intra-1×N coordinates for a shape of the blockage via the higher-level coordinates, and creating routes of intra-1×N wires of the 1×N building block that avoid the intra-1×N coordinates. Further embodiments comprise an apparatus having a higher-level wiring examiner to examine higher-level wiring of an area near a 1×N building block of a physical design representation. The apparatus may also have a blockage determiner to determine a blockage that affects intra-1×N wiring for the 1×N building block and a coordinate calculator to calculate coordinates of a shape of the blockage, wherein the calculated coordinates may enable a routing tool to avoid the shape when creating intra-1×N wiring for the 1×N building block.
机译:公开了使用用于1×N编译器的高级布线信息来路由1×N构件的实施例。一些实施例包括:确定用于1×N构件的阻塞的较高级坐标;经由高层坐标确定用于阻塞的形状的-1×N内坐标;以及创建1×N构件的内部×1N线的路线。避免内部1×N坐标的1×N构造块。进一步的实施例包括一种设备,该设备具有高层布线检查器,以检查物理设计表示的1×N构件附近的区域的高层布线。该装置还可以具有阻塞确定器,该阻塞确定器确定影响1×N构件的1×N内布线的阻塞;以及坐标计算器,以计算该阻塞的形状的坐标,其中,所计算的坐标可以启用路由工具。为1×N构建块创建内部1×N布线时避免形状。

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