Securing memory based IP in FPGAs

摘要

A memory initialization file and one or more design files associated with configuring an IC are identified. The memory initialization file is encrypted using one or more encryption algorithms. A configuration bit stream is generated by compiling and assembling the encrypted memory initialization file and the one or more design files. During the programming phase, the configuration bit stream is received at the IC, decoded and logic design and content of encrypted memory initialization file are loaded into the respective logic elements and memory arrays of the IC. The IC then transitions into a user phase where the contents of the encrypted memory initialization file in the memory arrays are decrypted and validated at the on-chip memory within the IC to ensure that the integrity of the content is maintained. Upon successful verification of the integrity of the content, the content within the on-chip memory is available for processing.