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Multi-die semiconductor package structure and method for manufacturing the same

机译:多管芯半导体封装结构及其制造方法

摘要

The present invention provides a multi-die semiconductor package structure and a manufacturing method thereof, which includes providing at least two dies and a lead frame including a die pad and a lead wire located at the periphery of the die pad, the die pad has a via hole at the edge thereof, binding a base opposite side of a first die to the die pad; electrically connecting the first die to the lead wire through the via hole; binding a base side of a second die to the die pad, the first and second dies are disposed on the opposite sides of the die pad respectively; electrically connecting the second die to the lead wire; stacking other dies above the first or second die and electrically connecting them to the lead wire; and encapsulating said at least two dies and the lead frame to form a package.
机译:本发明提供了一种多管芯半导体封装结构及其制造方法,该方法包括:提供至少两个管芯;以及引线框架,其包括管芯焊盘和位于该管芯焊盘的外围的导线,该管芯焊盘具有:在其边缘处的通孔将第一管芯的基极相对侧结合到管芯焊盘。通过通孔将第一管芯电连接到引线;将第二管芯的基侧结合到管芯焊盘,第一管芯和第二管芯分别设置在管芯焊盘的相对侧。将第二管芯电连接到引线;将其他裸片堆叠在第一裸片或第二裸片上方,并将它们电连接至引线;封装所述至少两个管芯和引线框架以形成封装。

著录项

  • 公开/公告号US7875505B2

    专利类型

  • 公开/公告日2011-01-25

    原文格式PDF

  • 申请/专利权人 TSING-CHOW WANG;

    申请/专利号US20070942174

  • 发明设计人 TSING-CHOW WANG;

    申请日2007-11-19

  • 分类号H01L21/00;

  • 国家 US

  • 入库时间 2022-08-21 18:08:54

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