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Embedded architecture with serial interface for testing flash memories

机译:具有串行接口的嵌入式体系结构,用于测试闪存

摘要

A flash memory device includes a flash memory array, a set of non-volatile redundancy registers, a serial interface, and testing logic coupled to the serial interface, the testing logic configured to accept a set of serial commands from an external tester; erase the array; program the array with a test pattern; read the array and compare the results with expected results to identify errors; determine whether the errors can be repaired by substituting a redundant row or column of the array, and if so, generate redundancy information; and program the redundancy information into the non-volatile redundancy registers.
机译:一种闪存设备,包括闪存阵列,一组非易失性冗余寄存器,串行接口以及耦合至该串行接口的测试逻辑,该测试逻辑被配置为接受来自外部测试器的一组串行命令;以及擦除阵列;用测试模式对阵列进行编程;读取阵列并将结果与​​预期结果进行比较以识别错误;确定是否可以通过替换阵列的冗余行或列来修复错误,如果可以,则生成冗余信息;并将冗余信息编程到非易失性冗余寄存器中。

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