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Embedded architecture with serial interface for testing flash memories
Embedded architecture with serial interface for testing flash memories
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机译:具有串行接口的嵌入式体系结构,用于测试闪存
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摘要
A flash memory device includes a flash memory array, a set of non-volatile redundancy registers, a serial interface, and testing logic coupled to the serial interface, the testing logic configured to accept a set of serial commands from an external tester; erase the array; program the array with a test pattern; read the array and compare the results with expected results to identify errors; determine whether the errors can be repaired by substituting a redundant row or column of the array, and if so, generate redundancy information; and program the redundancy information into the non-volatile redundancy registers.
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