Interface including task page mechanism with index register between host and an intelligent memory interfacing multitask controller

摘要

A computing system that includes a number of processing elements, a memory and a multi-task controller is disclosed. The memory has an interface that includes a task page mechanism with an index register. A portion of the multi-task controller also has a task page register for accessing the memory via another interface. The task page mechanism provides access to the memory by the host processor. The index register can be loaded by either the address or data bus of the host processor. In one embodiment, the task page mechanism includes a comparator and a counter to facilitate a polling scan of the status of the various tasks in the memory.