A METHOD AND APPARATUS FOR THE EFFICIENT PROCESSING OF DATA-INTENSIVE APPLICATIONS

摘要

A system and method for providing a sustained,peak performance computing architecture is provided.A hardware processing architecture is provided forperforming repeated algorithm iterations, wherein eachof the algorithm iterations is performed on a parallelset of algorithm input data. The architecture includes amemory arranged to store the algorithm input data inparallel, contiguous bit locations. A parallel executionmodule having a plurality of functional execution unitsis provided, each of the functional execution unitsbeing configured to perform a preassigned functiondictated by the algorithm on predetermined bits ofeach iterative parallel set of algorithm input data. Adata flow module is coupled to the memory and to theparallel execution module, and is configured toreplicate in hardware the control constructs andexpression evaluations of the algorithm, and todistribute the input data to the plurality of functionexecution units in accordance with the controlconstructs and expression evaluations of the algorithm.