To achieve improved jitter performance within prescribed bandwidthconstraints, a receiver (140) samples a digital signal (11) upon each of nperiodic sample clock pulses that occur during the interval t, where n ischosen such that log2(n+1) is an integer (x) greater than zero. At the each ofeach interval t, the receiver generates a x+1-bit sample value having a firstbit indicating the value of the digital signal being sampled, and x remainingbits which collectively indicate a sample interval during which the digitalsignal changed states if such a change did occur When a change does occur, thereceiver inverts the first bit of each sample value upon decoding to coincidewith the change in the digital signal.
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