ANTI-ISLANDING FOR GRID-TIE INVERTER USING COVARIANCE ESTIMATION AND LOGIC DECISION MAKER

摘要

An anti-islanding implementation that introduces a small, continuously varying phase shift pattern in the output current of an inverter. In grid-connected mode, this phase shift pattern has no impact on the frequency of the inverter's output voltage. However, when islanded, the phase shift will cause the voltage frequency to deviate from nominal. Changes in the output current phase thus correlate well with the voltage frequency, so a covariance index is used to detect an islanding configuration. When this index exceeds a threshold, a larger phase shift pattern is introduced in the output current, large enough to cause the voltage frequency to fall outside the inverter's trip protection window without compromising the inverter's power quality yet ensuring reliable tripping of the inverter.