首页> 外国专利> PROCESS/DESIGN METHODOLOGY TO ENABLE HIGH PERFORMANCE LOGIC AND ANALOG CIRCUITS USING A SINGLE PROCESS

PROCESS/DESIGN METHODOLOGY TO ENABLE HIGH PERFORMANCE LOGIC AND ANALOG CIRCUITS USING A SINGLE PROCESS

机译:使用单个过程启用高性能逻辑和模拟电路的过程/设计方法

摘要

A method for improving analog circuits performance using a circuit design using forward bias and a modified mixed-signal process is presented. A circuit consisting plurality of NMOS and PMOS transistors is defined. The body terminal of the NMOS transistors are coupled to a first voltage source and the body terminal of the PMOS transistors are coupled a second voltage source. Transistors in the circuit are selectively biased by applying the first voltage source to the body terminal of each selected NMOS transistor and applying the second voltage source to the body terminal of each selected PMOS transistor. In one embodiment, the first voltage source and the second voltage source are modifiable to provide forward and reverse bias to the body terminal of the transistors.
机译:提出了一种使用正向偏置和改进的混合信号工艺的电路设计来改善模拟电路性能的方法。定义了由多个NMOS和PMOS晶体管组成的电路。 NMOS晶体管的主体端子耦合到第一电压源,并且PMOS晶体管的主体端子耦合到第二电压源。通过将第一电压源施加到每个选定的NMOS晶体管的体端子,并将第二电压源施加到每个选定的PMOS晶体管的体端子,来选择性地偏置电路中的晶体管。在一个实施例中,第一电压源和第二电压源可被修改以向晶体管的体端子提供正向和反向偏置。

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