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IN-OUT DATA ADDRESS GENERATION CIRCUIT AND METHOD OF CONTINUOUS FLOW MEMORY-BASED FFT PROCESSOR USING MULTIPLE BUTTERFLIES
IN-OUT DATA ADDRESS GENERATION CIRCUIT AND METHOD OF CONTINUOUS FLOW MEMORY-BASED FFT PROCESSOR USING MULTIPLE BUTTERFLIES
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机译:使用多个蝶形的基于连续流存储器的FFT处理器的进出数据地址生成电路和方法
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摘要
PURPOSE: entering and leaving the quantity that data address generative circuit and method continuous flow selectively control butterfly using multiple butterflies based on memory fft processor includes fft processor serial process, is used without increasing memory. ;CONSTITUTION: operating unit (101) includes multiple butterfly processing butterfly computations. Input/output interface (104) handles data input and exports from above-mentioned field memory. Input data exchanges circuit (105) and provides butterfly input from field memory to operating unit. A kind of output data switched circuit (106) provides butterfly output from operating unit and field memory. ;The 2011 of copyright KIPO submissions
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