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MAT COMPRESS CIRCUIT AND A SEMICONDUCTOR MEMORY DEVICE USING THE SAME, CAPABLE OF PREVENTING THE MALFUNCTION OF THE MAT COMPRESS CIRCUIT DURING A MAT COMPRESS TEST
MAT COMPRESS CIRCUIT AND A SEMICONDUCTOR MEMORY DEVICE USING THE SAME, CAPABLE OF PREVENTING THE MALFUNCTION OF THE MAT COMPRESS CIRCUIT DURING A MAT COMPRESS TEST
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机译:垫压缩电路和使用该垫压缩电路的半导体存储器,能够防止垫压缩测试期间垫压缩电路的故障
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摘要
PURPOSE: A MAT compress circuit and a semiconductor memory device using the same are provided to drive all bit-line sense amplifier in connection with a selected MAT by reversing the phases of controlling signals which controls an input-output switching signal.;CONSTITUTION: A switching signal generating unit(1) is composed of a NAND gate and an inverter. The switching signal generating unit a switching signal enabled to a high-level and a reversed switching signal enabled to a low-level. A control signal generating unit(2) is composed of a control signal transferring unit, a first buffer and a second buffer. A first MAT controlling part generates a first input-output switching signal. A second MAT controlling part generates a second input-output switching signal.;COPYRIGHT KIPO 2011
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