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BANK STRUCTURE OF A FPGA BOARD MINIMIZING FOR SEMICONDUCTOR CERTIFICATION, CAPABLE OF MINIMIZING THE DISTANCE BETWEEN AN ARBITRARY SECTION AFTER AN IO PIN IS DIVIDED AND A CONNECTOR CONNECTED TO THE SECTION
BANK STRUCTURE OF A FPGA BOARD MINIMIZING FOR SEMICONDUCTOR CERTIFICATION, CAPABLE OF MINIMIZING THE DISTANCE BETWEEN AN ARBITRARY SECTION AFTER AN IO PIN IS DIVIDED AND A CONNECTOR CONNECTED TO THE SECTION
PURPOSE: A bank structure is provided to effectively form a board by minimizing a pattering wiring.;CONSTITUTION: An FPGA board(100) is composed of a FPGA device(110) and a connector(200). The FPGA device has a logic circuit in order to verify a semiconductor. A plurality of connectors output and input a signal to the embedded FPGA device. A plurality of input/output pins are divided into an arbitrary number and are allocated into a plurality of regions. The connector is allocated to a plurality of regions.;COPYRIGHT KIPO 2011
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