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A differential amplifier circuit having a wide bandwidth common mode input voltage range and an input buffer including the differential amplifier circuit
A differential amplifier circuit having a wide bandwidth common mode input voltage range and an input buffer including the differential amplifier circuit
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机译:具有宽带宽共模输入电压范围的差分放大器电路和包括该差分放大器电路的输入缓冲器
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摘要
PURPOSE: A self biased differential amplifier with a wide common mode input voltage range and an input buffer is provided to minimize the variation width of a self-bias voltage by maintaining the complementation between transistors to self bias of the input signal. CONSTITUTION: An input buffer(400) comprises a differential amplification circuit(410) and inverters(131,133). The differential amplification circuit comprises P type CMOS(Complementary Metal Oxide Semiconductor) transistors(9a,9b) and N type CMOS transistors(10a,10b). The inverter receives the output signal of the differential amplification circuit and outputs a final digital signal.
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