首页>
外国专利>
Circuit arrangement for fault-tolerant power-optimized control of BLDC motors
Circuit arrangement for fault-tolerant power-optimized control of BLDC motors
展开▼
机译:BLDC电机的容错功率优化控制的电路装置
展开▼
页面导航
摘要
著录项
相似文献
摘要
The method involves continuously updating commutation time points by measuring the time difference between two immediately successive null crossings (TN1,TN2) of the induced voltage in the non-current-carrying motor coil and commutating the next motor phase after half the determine time difference has elapsed. This is continued, using a switching algorithm for all phases. Independent claims are also included for the following: (a) a circuit arrangement for power-optimal control of brushless DC motors (b) a method of starting a BDLC motor (c) and a method of fault-tolerant power-optimal operation of a BDLC motor.
展开▼