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SYSTEM FOR TESTING A MULTITASTIC CALCULATION ARCHITECTURE FROM PROCESSOR COMMUNICATION DATA AND CORRESPONDING TEST METHOD
SYSTEM FOR TESTING A MULTITASTIC CALCULATION ARCHITECTURE FROM PROCESSOR COMMUNICATION DATA AND CORRESPONDING TEST METHOD
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机译:处理器通信数据测试多元计算架构的系统及相应的测试方法
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摘要
A multitask computing architecture system comprising a set of processors connected by data communication channels comprising a test instruction sequence generation stage (B) based on characteristics of said processors including programming rules of computing processors, characterized in that it comprises a control stage (A) of the sequence generation stage from the data representative of the data communication channels.
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