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Apparatus and method embodying the SRAM output characteristics in DRAM

机译:体现DRAM中的SRAM输出特性的设备和方法

摘要

A method is provided for achieving SRAM output characteristics from DRAMs, in which a plurality of DRAMs are arranged connected in parallel to a controller in such a way as to be able to obtain SRAM output characteristics using the DRAMs, comprising a process in which data is output to an external device when a control signal for data reading has been input from the external device, by sequentially repeating a step in which the controller sends a data output state control signal to one DRAM and sends a refresh standby state control signal to the other DRAMs, the data is read and sent to the external device from the DRAM in the output state, and a refresh standby state control signal is sent to the DRAM which was in the output state while an output state control signal is sent to another DRAM and data is read out from the DRAM in the output state, and a step in which the controller sends a control signal for changing the output state to the refresh standby state.
机译:提供了一种用于从DRAM获得SRAM输出特性的方法,其中多个DRAM被布置为与控制器并联连接,使得能够使用DRAM获得SRAM输出特性,该方法包括以下过程:当已经从外部设备输入了用于数据读取的控制信号时,通过顺序重复控制器将数据输出状态控制信号发送到一个DRAM以及将刷新待机状态控制信号发送到另一个的步骤,将输出输出到外部设备DRAM,在输出状态下将数据从DRAM读取并发送到外部设备,将刷新待机状态控制信号发送到处于输出状态的DRAM,同时将输出状态控制信号发送到另一个DRAM和在输出状态下从DRAM中读出数据,并且控制器发送控制信号以将输出状态改变为刷新待机状态的步骤。

著录项

  • 公开/公告号JP2012512496A

    专利类型

  • 公开/公告日2012-05-31

    原文格式PDF

  • 申请/专利权人 イ;ソンゼ;

    申请/专利号JP20110542021

  • 发明设计人 イ;ソンゼ;

    申请日2010-05-19

  • 分类号G11C11/406;G11C11/403;

  • 国家 JP

  • 入库时间 2022-08-21 17:40:32

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