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Technology to minimize control voltage ripple caused by charge pump leak in PLL (PHASELOCKEDLOOP) circuit
Technology to minimize control voltage ripple caused by charge pump leak in PLL (PHASELOCKEDLOOP) circuit
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机译:最小化由PLL(PHASELOCKEDLOOP)电路中的电荷泵泄漏引起的控制电压纹波的技术
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摘要
Techniques for adaptively control of a loop filter sampling interval to mitigate the effects of charge pump leakage current in an apparatus including a phase lock loop circuit are provided. In one aspect, the apparatus includes a voltage controlled oscillator (VCO), a phase frequency detector (PFD) providing a phase comparison operation, a loop filter providing a control voltage to lock the VCO to a desired operating frequency, and a charge pump configured to provide an output signal to the loop filter in response to at least one of an UP pulse and a DOWN pulse. The apparatus further includes a sampling switch, coupled between an input of the loop filter, an output of the charge pump, and characterized by a sampling interval. A sampling switch controller is configured to adaptively control the width of the sampling interval in order to mitigate the effects of leakage current from the charge pump by closing the sampling switch in advance of the phase comparison operation and opening the sampling switch when the phase comparison operation is completed.
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