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Instruction set architecture with instruction characteristic bit indicating a result is not of architectural importance
Instruction set architecture with instruction characteristic bit indicating a result is not of architectural importance
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机译:具有指示结果的指令特征位的指令集架构并不重要
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摘要
Instead of having a processor with an instruction set architecture (ISA) that includes fixed architected operands, an improved processor supports additional characteristic bits for computing instructions (e.g., a multiply-add, load/store instructions). Such additional bits for the certain instructions influence the processing of these instructions by the processor. Also, a new instruction is introduced for further usage of the proposed method. Typically these additional characteristic bits as well as the instruction can be automatically generated by compilers to provide relatively well-suited instruction sequences for the processor.
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