首页> 外国专利> SCATTER/GATHER ACCESSING MULTIPLE CACHE LINES IN A SINGLE CACHE PORT

SCATTER/GATHER ACCESSING MULTIPLE CACHE LINES IN A SINGLE CACHE PORT

机译:在单个缓存港中访问多个缓存行的散射/盖特

摘要

Methods and apparatus are disclosed for accessing multiple data cache lines for scatter/gather operations. Embodiment of apparatus may comprise address generation logic to generate an address from an index of a set of indices for each of a set of corresponding mask elements having a first value. Line or bank match ordering logic matches addresses in the same cache line or different banks, and orders an access sequence to permit a group of addresses in multiple cache lines and different banks. Address selection logic directs the group of addresses to corresponding different banks in a cache to access data elements in multiple cache lines corresponding to the group of addresses in a single access cycle. A disassembly/reassembly buffer orders the data elements according to their respective bank/register positions, and a gather/scatter finite state machine changes the values of corresponding mask elements from the first value to a second value.
机译:公开了用于访问多个数据高速缓存行以进行分散/收集操作的方法和装置。装置的实施例可以包括地址生成逻辑,以针对一组具有第一值的对应掩码元素中的每一个,从一组索引的索引中生成地址。行或库匹配排序逻辑匹配同一高速缓存行或不同库中的地址,并命令访问序列以允许多个高速缓存行和不同库中的一组地址。地址选择逻辑将地址组定向到高速缓存中的相应不同存储体,以在单个访问周期中访问与该地址组相对应的多条高速缓存行中的数据元素。拆卸/重新组装缓冲器根据数据元素各自的存储体/寄存器位置对数据元素进行排序,并且聚集/散射有限状态机将相应掩码元素的值从第一值更改为第二值。

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