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SYSTEM AND METHOD FOR EFFICIENT MODELING OF NPSKEW EFFECTS ON STATIC TIMING TESTS

机译:NPSKEW效应对静态时序测试的有效建模的系统和方法

摘要

A computer-implemented method that simulates NPskew effects on a combination NFET (Negative Field Effect Transistor)/PFET (Positive Field Effect Transistor) semiconductor device using slew perturbations includes performing a timing test by a computing device, by: (1) evaluating perturb slews in Strong N/Weak P directions on the combination semiconductor device for a timing test resu (2) evaluation perturb slews in Weak N/Strong P directions on the combination semiconductor device for a timing test resu and (3) evaluating unperturbed slews in a balanced condition on the combination semiconductor device for a timing test result. After each test is performed, a determination is made as to which evaluation of the perturbed and unperturbed slews produces a most conservative timing test result for the combination semiconductor device. An NPskew effect adjusted timing test result is finally output based on determining the most conservative timing test result.
机译:一种使用压摆扰动模拟NFET(负场效应晶体管)/ PFET(正场效应晶体管)组合半导体器件上的NPskew效应的计算机实现方法,包括通过计算设备执行时序测试,方法是:(1)评估扰动摆率在组合半导体器件上沿强N /弱P方向,以获得时序测试结果; (2)在组合半导体器件上在弱N /强P方向上评估扰动摆率,以获得时序测试结果; (3)在平衡状态下,对组合半导体装置的无干扰摆率进行评估,以求定时测试结果。在执行每个测试之后,确定对于组合半导体器件而言,对被扰动和未被扰动的回转的哪个评估产生最保守的时序测试结果。根据确定的最保守的时序测试结果,最终输出NPskew效果调整的时序测试结果。

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