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Pixel layout structure for raising capability of detecting amorphous silicon residue defects and method for manufacturing the same
Pixel layout structure for raising capability of detecting amorphous silicon residue defects and method for manufacturing the same
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机译:用于提高检测非晶硅残留缺陷的能力的像素布局结构及其制造方法
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摘要
Disclosed is a pixel layout structure capable of increasing the capability of detecting amorphous silicon (a-Si) residue defects and a method for manufacturing the same. Wherein, an a-Si dummy layer is disposed on either one side or both sides of each data line. The design of such an a-Si dummy layer is utilized, so that in an existing testing conditions (by making use of an existing automatic array tester in carrying out the test), in case that there exists an a-Si residue in a pixel, the pixel having defects can be detected through an enhanced capacitance coupling effect and an electron conduction effect. Therefore, through the application of the above-mentioned design, the capability of an automatic array tester can effectively be increased in detecting a defective pixel having a-Si residues.
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