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Systems and methods for downloading algorithmic elements to a coprocessor and corresponding techniques

机译:用于将算法元素下载到协处理器的系统和方法以及相应的技术

摘要

Systems and methods for downloading algorithmic elements to a coprocessor and corresponding processing and communication techniques are provided. For an improved graphics pipeline, the invention provides a class of co-processing device, such as a graphics processor unit (GPU), providing improved capabilities for an abstract or virtual machine for performing graphics calculations and rendering. The invention allows for runtime-predicated flow control of programs downloaded to coprocessors, enables coprocessors to include indexable arrays of on-chip storage elements that are readable and writable during execution of programs, provides native support for textures and texture maps and corresponding operations in a vertex shader, provides frequency division of vertex streams input to a vertex shader with optional support for a stream modulo value, provides a register storage element on a pixel shader and associated interfaces for storage associated with representing the “face” of a pixel, provides vertex shaders and pixel shaders with more on-chip register storage and the ability to receive larger programs than any existing vertex or pixel shaders and provides 32 bit float number support in both vertex and pixel shaders.
机译:提供了用于将算法元素下载到协处理器以及相应的处理和通信技术的系统和方法。对于改进的图形流水线,本发明提供了一类协同处理设备,例如图形处理器单元(GPU),为用于执行图形计算和渲染的抽象或虚拟机提供了改进的功能。本发明允许对下载到协处理器的程序进行运行时预测的流控制,使协处理器能够包括片上存储元件的可索引阵列,该片上存储元件在程序执行期间是可读写的,为纹理和纹理映射以及相应的操作提供了本机支持。顶点着色器,提供输入到顶点着色器的顶点流的频分,并具有对流模值的可选支持,在像素着色器上提供寄存器存储元素,并提供与表示像素“面”相关的存储相关接口,提供顶点着色器和像素着色器具有更多的片上寄存器存储,并且能够接收比任何现有顶点或像素着色器更大的程序,并且在顶点和像素着色器中均提供32位浮点数支持。

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