首页> 外国专利> Shared processor architecture applied to functional stages configured in a receiver system for processing signals from different transmitter systems and method thereof

Shared processor architecture applied to functional stages configured in a receiver system for processing signals from different transmitter systems and method thereof

机译:应用于处理器系统中配置的功能级的共享处理器体系结构,用于处理来自不同发射机系统的信号及其方法

摘要

According to an embodiment of the present invention, a shared processor architecture in a receiver system is disclosed. The receiver system is configured to have a first functional stage and a second functional stage for processing information carried by signals from a first transmitter system and a second transmitter system respectively. The first functional stage and the second functional stage correspond to an identical signal processing function. The shared processor architecture includes a first processor, allocated to the first functional stage and the second functional stage, for processing an output generated from the first functional stage or an output from the second functional stage.
机译:根据本发明的实施例,公开了一种接收机系统中的共享处理器架构。接收机系统被配置为具有第一功能级和第二功能级,用于处理分别来自第一发射机系统和第二发射机系统的信号所携带的信息。第一功能阶段和第二功能阶段对应于相同的信号处理功能。共享处理器体系结构包括分配给第一功能阶段和第二功能阶段的第一处理器,用于处理从第一功能阶段产生的输出或从第二功能阶段产生的输出。

著录项

  • 公开/公告号US8284820B2

    专利类型

  • 公开/公告日2012-10-09

    原文格式PDF

  • 申请/专利权人 CHUN-NAN CHEN;JIA-HORNG SHIEH;

    申请/专利号US20070873415

  • 发明设计人 JIA-HORNG SHIEH;CHUN-NAN CHEN;

    申请日2007-10-17

  • 分类号H04B1/709;

  • 国家 US

  • 入库时间 2022-08-21 17:28:04

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