Processor array accessing data in memory array coupled to output processor with feedback path to input sequencer for storing data in different pattern

摘要

An integrated circuit arrangement has a processor array (2) with processor elements (4) and a memory (6) with memory elements (8) arranged in rows (32) and columns (30). The columns (30) of memory elements (8) are addressed by respective processor elements (4). An input sequencer (14) and feedback path (24) cooperate to reorder input data in the memory (6) to carry out both block and line based processing.