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Hardware based parallel processing cores with multiple threads and multiple pipeline stages
Hardware based parallel processing cores with multiple threads and multiple pipeline stages
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机译:具有多个线程和多个流水线级的基于硬件的并行处理核心
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摘要
A pipelined out-of-order process and system for handling data packets in a network device. The process and system are scalable to support throughput in excess of 10 Gbps. The system includes a set of processing cores that offload the table look up operations and similar operations from the central processing unit. The central processing unit receives the requisite data needed for performing forwarding, routing, NAT, firewall maintenance and similar operation on data packets from the set of processing cores.
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