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Failure diagnostic apparatus, failure diagnostic system, and failure diagnostic method

机译:故障诊断装置,故障诊断系统以及故障诊断方法

摘要

There is provided a failure diagnostic apparatus that diagnoses a semiconductor integrated circuit device for failure based on a compressed signal obtained by compressing a plurality of signals outputted from a plurality of scan chains in which a plurality of scan flip-flops, to which signals from the semiconductor integrated circuit device are inputted, are connected in series. For each stage of the scan chains, the failure diagnostic apparatus sets a virtual space compression circuit that compresses output signals of the scan flip-flops in the stage and a virtual pin connected to the output terminal of the virtual space compression circuit, and the output signal of the virtual pin is compared with the compression signal to diagnose the semiconductor integrated circuit device for failure.
机译:提供了一种故障诊断装置,其基于通过压缩从多个扫描链输出的多个信号获得的压缩信号来诊断半导体集成电路装置的故障,在所述多个扫描链中,多个扫描触发器从所述多个扫描触发器输出。半导体集成电路器件输入,串联连接。对于扫描链的每一级,故障诊断设备设置虚拟空间压缩电路和虚拟引脚,该虚拟空间压缩电路压缩该级中的扫描触发器的输出信号,该虚拟引脚连接到虚拟空间压缩电路的输出端子,并且该输出将虚拟引脚的信号与压缩信号进行比较,以诊断半导体集成电路器件是否发生故障。

著录项

  • 公开/公告号US8086926B2

    专利类型

  • 公开/公告日2011-12-27

    原文格式PDF

  • 申请/专利权人 TAKAYUKI KATO;

    申请/专利号US20080051412

  • 发明设计人 TAKAYUKI KATO;

    申请日2008-03-19

  • 分类号G01R31/28;

  • 国家 US

  • 入库时间 2022-08-21 17:26:06

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