A PCI bus time-based weighted round robin arbiter (200) has a phase table (202) divided into a plurality of phases (0-127). Each of the phases is assigned to one of the ports on the PCI bus. An arbiter state machine (250) is coupled to the phase table (202) and looks at the port assignment for the next plurality of phases, for example, three phases. If the arbiter (200) determines that the next plurality of phases is assigned to a single port, that port is selected as the next bus master.
展开▼
