首页> 外国专利> HIGH ELECTRON MOBILITY TRANSISTOR WITH A REDUCED CHANNEL LENGTH CAPABLE OF REDUCING ON-RESISTANCE BY REDUCING CHANNEL RESISTANCE AND A MANUFACTURING METHOD THEREOF

HIGH ELECTRON MOBILITY TRANSISTOR WITH A REDUCED CHANNEL LENGTH CAPABLE OF REDUCING ON-RESISTANCE BY REDUCING CHANNEL RESISTANCE AND A MANUFACTURING METHOD THEREOF

机译:具有减小的通道长度的,能够通过减小通道电阻来减小导通电阻的高电子迁移率晶体管及其制造方法

摘要

PURPOSE: A high electron mobility transistor with a reduced channel length and a manufacturing method thereof are provided to reduce the length of an effective gate of a gate electrode less than a minimum line width.;CONSTITUTION: A buffer layer(24) is arranged on a substrate(20). A first semiconductor layer(30) is arranged on the buffer layer. A second semiconductor layer(32) is arranged on the semiconductor layer. A 2DEG(2-Dimensional Electron Gas) channel is arranged on the first semiconductor layer by the second semiconductor layer. A source electrode(34S) and drain electrode(34D) are arranged on the second semiconductor layer.;COPYRIGHT KIPO 2012
机译:目的:提供一种沟道长度减小的高电子迁移率晶体管及其制造方法,以将栅电极的有效栅极长度减小到小于最小线宽。组成:缓冲层(24)设置在其上基板(20)。在缓冲层上布置第一半导体层(30)。第二半导体层(32)布置在半导体层上。 2DEG(二维电子气)通道被第二半导体层布置在第一半导体层上。源电极(34S)和漏电极(34D)布置在第二半导体层上。COPYRIGHTKIPO 2012

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