CLOCK MANAGEMENT UNIT CAPABLE OF MAINTAINING A TIME INTERVAL BETWEEN A RELEASE TIME OF A RESET SIGNAL TIME AND A TIME FOR PROVIDING A CLOCK SIGNAL TO AN EXTERNAL CIRCUIT TO BE OVER A PRESET TIME

摘要

PURPOSE: A clock management unit is provided to simplify post design by eliminating a test for determining the maintenance of enough intervals between a release time and clock signal of a reset signal in post-design for a chip.;CONSTITUTION: A clock management unit(100) is used for driving an external circuit like various circuit modules in a chip. The clock management unit offers clock signals to the external circuit from reset signals for resetting the external circuit at least after two cyclical intervals of the clock signal. A delay unit(110) receives the clock signal and the reset signal. The delay unit outputs a delayed reset signal. An output unit(120) receives the clock signal and the delayed reset signal. The output unit offers the clock signals to the external circuit according to a delayed reset signal. An input unit(130) receives the reset signal and an enable signal.;COPYRIGHT KIPO 2012